1. Field of the Invention
The present invention relates to a technique that is effective when adapted to a power source system which performs parallel power supply to a load from a plurality of power supply units, e.g., a technique that is effective when adapted to the operational power source of a server system.
2. Description of the Related Art
A system that is demanded to be always in operation, such as a server system, requires a very reliable power source system in order to avoid interruption during system operation. There is a limit to keep the reliability of the power source system with a single power supply unit. As a solution to this limit, a parallel power source system has been proposed which uses a plurality of power supply units in parallel so that even when a short circuit failure occurs in some power supply unit, the other power supply units can keep supplying power to the system or load.
FIG. 5 shows an example of the structure of the parallel power source system.
The illustrated power source system is so designed as to supply power to a single common load ZL from the output terminals of a plurality of power supply units 1A and 1B, so that even when one power supply unit 1A, for example, fails, the other power supply unit 1B can ensure power supply to the load ZL.
This parallel structure can significantly improve the reliability of power supply. In addition, a single power supply unit or a combination of fewer kinds of power supply units can cope with multifarious power supply scales. Another advantage lies in that replacement, inspection or the like of a power supply unit can be carried out while keeping supplying power to the load ZL.
The power supply units 1A and 1B shown in the diagram are switching control type DC power supply units which generate DC power outputs of predetermined voltages Voa and Vob from AC input supply voltages (AC 100/200 V: 50/60 Hz) Each of the power supply units 1A and 1B has its power input side and power output side insulated and isolated from each other on the primary side and secondary side of a high frequency transformer T, and has a feedback control path from the secondary side of the transformer T to the primary side insulated and isolated by a photo coupler Pc.
A bridge type rectifying circuit D1 for primary rectification and smoothing, a capacitive element Cl, a switching power MOS transistor M1 and a primary control circuit 2 which includes a PWM (Pulse Width Modulation) control circuit are provided on the power input side of each power supply unit to supply a high frequency pulse current to the primary coil of the high frequency transformer T.
MOS transistors M2 and M3, which constitute a synchronous rectifying circuit, an inductance element LC and a capacitive element CL for secondary smoothing, a resistive element Rs for current detection, a secondary control circuit 3 which is linked to the primary control circuit 2 via the photo coupler Pc, and an inverse-current preventing diode D2 are provided on the power output side of each power supply unit to rectify and smooth high frequency electromotive force induced on the secondary coil of the high frequency transformer T. The rectified and smoothed electromotive force is led to an output terminal.
The power supply units 1A and 1B may suffer a possible failure of a short-circuited damage on the secondary smoothing capacitive element CL. If such a failure occurs in any power supply unit 1A or 1B, the power supply output of the other power supply unit 1B or 1A is also short-circuited, causing the entire power source system to be down (inoperative). To avoid it, a diode D2 is intervened in series in the output path in each of the power supply units 1A and 1B as illustrated in the diagram. The inverse-current preventing operation of the diode D2 realizes a highly reliable parallel power source system such that even when one power supply unit 1A fails, the other power supply unit 1B can keep supplying power to the load ZL.
The present inventors found out that the above-described technique has the following shortcoming.
To speed up the operation information processing systems, such as a server, and reduce the consumed power thereof, the operational supply voltage of the systems has become lower, for example, from 5 V to 3 V. That is, a lower supply voltage and a large operational current are sought out. In this case, the parallel power source system should face a considerable issue of power loss caused by a voltage drop in the forward direction of the diode D2 that prevents the inverse current. To cope with the problem, the present inventors have considered the prevention of the inverse current using a power MOS transistor M4 which has a small voltage drop or power loss as shown in FIG. 6.
FIG. 6 exemplifies the results of the study on the parallel power source system by the present inventors.
The illustrated parallel power source system has the power MOS transistor M4 intervened in series in the output path in each of the power supply units 1A and 1B that constitutes the system, monitors output currents Ioa and Iob are monitored via the current detecting resistive element Rs and performs such control as to turnoff the MOS transistor M4 when the direction of the current flowing in the output path in each unit 1A or 1B is reversed to the direction of the current flowing in the normal operation. That is, the MOS transistor M4 is turned on or off by a current response based on the detection of the current. This ON/OFF control of the MOS transistor M4 is performed within the secondary control circuit 3 and its control output is supplied to the gate of the MOS transistor M4 via a gate drive circuit 31. The above-described circuit structure forms an inverse-current preventing circuit 4xe2x80x2 having a small voltage loss in each power supply unit 1A, 1B and can thus construct a parallel power source system with a high power efficiency.
However, the present inventors found out that while the parallel power source system shown in FIG. 6 could reduce the voltage loss of the inverse-current preventing circuits 4xe2x80x2, a supply voltage VL to be applied to the load ZL would transiently show a significant change as shown in FIG. 7 and exceeds the rated voltage range of the load ZL when the inverse-current preventing circuit 4xe2x80x2 in any power supply unit should operate.
Specifically, in case where the secondary smoothing capacitive element CL in one (e.g., 1A) of the two power supply units 1A and 1B has a short circuit failure, the logical expectation is such that while the output current Ioa from that unit 1A decreases rapidly, the output current Iob from the other unit 1B increases so that the voltage VL to be supplied to the load ZL should be maintained constant. It was however discovered that actually the voltage VL to be supplied to the load ZL would not become constant and the load voltage VL would significantly vary in the process of compensating for a reduction in the output current Ioa of one unit 1A with an increase in the output current Iob of the other unit 1B. It was also found out that the variation in load voltage VL would occur due to a parasitic inductance Ls distributed in the power source wiring to the load ZL when the output current Ioa of one unit 1A was commutated from the forward direction to the reverse direction.
Suppressing a variation in load voltage VL therefore requires that the parasitic inductance Ls should be reduced as much as possible. To fulfill the requirement, the power source wiring should be made as short as possible. Realizing the short power source wiring in the parallel power source system would raise a new problem of considerably impairing the flexibility of the system design. If the power source wiring is shortened, intervention of some sort of a parasitic inductance Ls is unavoidable. After all, it was not possible to fundamentally overcome the problem with the shortening of the power source wiring.
Accordingly, the invention has been made in consideration of the background and the knowledge mentioned above and aims at providing a technique that can reduce a voltage loss in an inverse-current preventing circuit provided in each of parallel-connected plural power supply units in a parallel power source system, maintain the flexibility of the system design including lengths of power source wirings, and allow other power supply units than any power supply unit having a short circuit failure to keep supplying power stably without significantly changing a voltage supplied to a load.
It is another object of the invention to provide an inverse-current preventing circuit suitable for use in the parallel power source system.
Typical ones of the subject matters of the invention disclosed in the present application will be briefly described below.
According to one aspect of the invention, there is provided a parallel power source system comprising a plurality of power supply units for supplying powers from output terminals thereof to a load in parallel; and inverse-current preventing circuits, respectively provided in the power supply units, for preventing inverse currents from the output terminals of the respective power supply units, each inverse-current preventing circuit including an MOS transistor which is intervened in series in an output path and forms a switch circuit for supplying power to a load, and a potential difference response circuit which operates to turn off the MOS transistor when a potential on a current-output side of the MOS transistor becomes greater than a potential on a current-input side thereof by at least a given amount.
When a short circuit failure occurs in a power supply unit, this parallel power source system can activate the inverse-current preventing circuit before the inverse current flows into that failed unit. This can achieve the first object of providing the technique that can reduce a voltage loss in an inverse-current preventing circuit provided in each of parallel-connected plural power supply units in a parallel power source system, maintain the flexibility of the system design including lengths of power source wirings, and allow other power supply units than any power supply unit having a short circuit failure to keep supplying power stably without significantly changing a voltage supplied to a load.
The parallel power source system may further comprise a current response circuit for controlling the MOS transistor to be turned off when a direction of a current flowing in the output path in each of the power supply units is reversed to a direction of a current flowing in a normal operation. This modified system provides double measures, a circuit responsive to a potential difference and a circuit responsive to a current, to ensure the inverse-current preventing state of the current from the output terminal. The double measures can prevent a failed unit from interfering with normal units more reliably.
In the parallel power source system or the modified system, the potential difference response circuit may comprise a charging circuit for charging a capacitive element in a forward direction of a diode with a potential appearing at an output terminal; and a voltage control transistor which is turned on by a difference between a charge voltage of the charging circuit and a voltage on the current-input side of the MOS transistor to perform clamp control of a gate-source voltage of the MOS transistor. It is therefore possible to relatively easily construct the inverse-current preventing circuit that demonstrates a fast response when a short circuit failure occurs in a power supply unit.
In the second modified parallel power source system, the voltage control transistor may be a bipolar transistor. That is, the inverse-current preventing circuit in the second modified parallel power source system can be constructed by using an npn or pnp bipolar transistor.
According to another aspect of the invention, there is provided a semiconductor integrated circuit including an inverse-current preventing circuit which comprises a switching MOS transistor for performing ON/OFF control of a current; a charging circuit for charging a capacitive element in a forward direction of a diode with a potential appearing on a current-output side of the MOS transistor; and a voltage control transistor which is turned on when a charge voltage of the charging circuit becomes higher than a voltage on a current-input side of the MOS transistor by at least a given amount to set a gate-source voltage of the MOS transistor to an OFF level. In this case, the inverse-current preventing circuit can be constructed as an independent unit which can be made into an IC (semiconductor integrated circuit). The use of this unit can reduce a voltage loss in an inverse-current preventing circuit provided in each of parallel-connected plural power supply units in a parallel power source system, maintain the flexibility of the system design including lengths of power source wirings, and allow other power supply units than any power supply unit having a short circuit failure to keep supplying power stably without significantly changing a voltage supplied to a load when the short circuit failure has occurred in that power supply unit.
The aforementioned objects of the invention and other objects and features various changes and modifications within the spirit and scope of the invention will become apparent from the following detailed description and the appended claims in conjunction with the accompanying drawings. In the accompanying drawings, same reference numerals indicate same or similar portions.